Maxim Integrated Products introduces the MAX3881 +3.3V, 2.488Gbps, SDH/SONET 1:16 deserializer with clock recovery that converts 2.488Gbps serial data to 16-bit wide, 155Mbps retimed parallel data. The MAX3881 expands the parallel interface options of its existing LVDS transceiver chipset by offering a single-ended PECL parallel interface. It forms a complete +3V, 2.5Gbps transceiver chipset when used with the MAX3891 16:1 serializer with clock synthesis. Its small form-factor, low power consumption, and excellent jitter performance make the MAX3881 ideal for applications in low-jitter OC-48/STM-16 transmission systems such as add/drop multiplexers and digital cross connects.
Operating from a single +3.3V supply, the MAX3881 accepts high-speed serial data inputs and delivers single-ended PECL parallel data and clock outputs for interfacing with digital circuitry, while consuming only 530mW of power. The fully integrated phase-locked loop recovers a synchronous clock signal from the serial NRZ data input and retimes it by the recovered clock. Jitter performance exceeds all ITU/Bellcore SDH/SONET specifications, and the MAX3881 provides an extra margin of 0.31UIp-p relative to the jitter tolerance specification at 10MHz. An additional 2.488Gbps serial input is available for system loopback diagnostic testing, and the MAX3881 also includes a TTL-compatible loss-of-lock (LOL) monitor.
Available in a 64-pin TQFP-EP (exposed pad) package in the extended temperature range (-40 degrees Celsius to +85 degrees Celsius), the MAX3881 is priced at $34.95 (1000-up, suggested resale, FOB USA). Evaluation kits are available.