Agere Systems unveils FlexPHY chip -- high-performance single physical layer device for scalable edge to core networks
Agere Systems Inc. introduced the FlexPHY integrated circuit (IC), a new single-chip physical layer (PHY) transceiver that reduces space and power by more than 50% over existing two-chip solutions, and enables the highest transmission signal quality for today's multi-service metropolitan edge to core networks. The FlexPHY device breaks all performance records of previous Agere PHY chips, offering the best performance, jitter margins, power consumption and integration, while lowering costs and speeding time-to-market for system vendors targeting 10-Gbits/sec SONET/SDH, Ethernet (10-Gigabit Ethernet) and Fibre Channel networks. Samples of the FlexPHY chip are expected to be available in the first quarter of calendar year 2003, with volume production expected by the second quarter of 2003.The market for 10-gigabit PHYs is expected to increase from $276 million in sales in 2003 to $780 A PHY transceiver chip transmits and receives data between the physical (optical fiber) and information processing layers. On a network line card, Agere's FlexPHY chip resides at the boundary between the protocol framer and the optics, providing the bridge for improved, multi-rate optical performance with multi-protocol support for the framer. The FlexPHY chip has more than double the density of competitive offerings and uses multi-rate, multi-protocol, signal integrity technology. The FlexPHY IC can be used in more communication network applications than comparable chips, from ATM and Ethernet switches and routers connecting data centers and IT infrastructure, to multiplexers and DWDM optical backbone transport systems.The FlexPHY chip's jitter generation is as low as 30 milli-unit interval (mUI) peak-to-peak (pk-pk). Most competitive single-chip CMOS devices have jitter generation of greater than 50 mUI pk-pk. A typical network system jitter generation budget is typically 100 mUI pk-pk. The low generated jitter allows for additional flexibility in system design and makes the FlexPHY chip suitable for all optical networking applications from very short reach (VSR) to ultra-long reach (ULR), including DWDM.To reduce board real estate, increase performance, flexibility and functionality, the FlexPHY chip integrates a clock multiplier unit (CMU), 16:1 multiplexer and 1:16 demultiplexer functions into a single device. It incorporates a highly sensitive (less than 10 mV) limiting amplifier with programmable amplitude threshold adjustment, as well as clock data recovery (CDR) function with programmable phase sampling point adjustment. These features extend the reach of the FlexPHY chip to ULR applications.It has a total average power consumption of 1.0 W versus most competitive solutions' 1.4 W to 2.0 W of power consumption. The FlexPHY chip's low power specification is key to developing high-density board designs for space-constrained equipment, improved performance and reliability.Agere's FlexPHY chip is manufactured in 0.13 micron CMOS technology, which contributes to higher performance, integration, versatility and functionality while at the same time lowering power, space and system development costs. As a result, the FlexPHY chip supports a wide range of protocols, rates and reach. It addresses 10 GE (10.31 Gbits/sec), 10 GFC (10.52 Gbits/sec), OC-192 (9.95 Gbits/sec), OC-192 forward error correction (FEC) (10.66 Gbits/sec) and G.709 FEC (10.71 Gbits/sec) rates.Further reducing space, power and cost, the FlexPHY IC integrates numerous previously discrete functions into a single system-on-chip (SoC), eliminating most external components. Agere expects to price volume production FlexPHY devices at $250 each in quantities of less than 1000 units.For more information about Agere Systems Inc. (Allentown, PA) or its product, visit the company's website at www.agere.com.