Analog Devices unveils CDR ICs for telecom applications

Feb. 9, 2005
February 8, 2005 Wilmington, MA -- Analog Devices today unveiled a new family of continuous-tuning clock and data recovery (CDR) integrated circuits (ICs) for fixed-rate, multi-rate and continuous-tuning data communications and telecom applications.

February 8, 2005 Wilmington, MA -- Analog Devices today unveiled a new family of continuous-tuning clock and data recovery (CDR) integrated circuits (ICs) for fixed-rate, multi-rate and continuous-tuning data communications and telecom applications.

The pin-compatible ADN2813, ADN2814, ADN2815, and ADN2816 family of CDRs eases optical network design by providing what the company claims is the industry's widest performance margin beyond SONET jitter specifications.

Offered in a variety of price and power points to suit a range of networking applications at 1.25 Gbits/sec and below, the new devices are pin-compatible with ADI's ADN2812, a fully automatic continuous-tuning CDR introduced in 2003.

Unlike other CDR solutions that are designed for specific data rates or that require external control to identify a specific frequency or band of frequencies, the continuous-tuning capabilities of the ADN2813, ADN2814, ADN2815, and ADN2816 enable the devices to recover any incoming data pattern without external control or the use of a reference clock, say company representatives. This enables equipment developed today to accommodate changing bit rate requirements in the future. For optical engineers, this means they can develop a single design that can be standardized for use in multiple systems.

The new family of continuous-tuning CDRs provides jitter performance that beats the SONET specifications by more than a factor of three in all categories, including jitter generation, jitter tolerance, jitter transfer, say company representatives. Their I2C interface provides access to exclusive features such as data rate readback, which identifies the data rate of the incoming signal. The CDRs operate from a single 3.3-V supply.

The ADN2813 (12.3 Mbits/sec - 1.25 Gbits/sec) and the ADN2814 (12.3 Mbits/sec - 675 Mbits/sec) include a limiting amplifier with 6-mV input sensitivity and slice adjust option and dissipate 430 mW (typical). When used with a PIN diode and a TIA amplifier, the ADN2813 and ADN2814 can implement a low-cost, low-power fiber-optic receiver.

The ADN2815 (12.3 Mbits/sec - 1.25 Gbits/sec) and the ADN2816 (12.3 Mbits/sec - 675 Mbits/sec), optimized for use with optical transceiver modules, include a limiting amplifier with 50-mV input sensitivity and dissipate 380 mW (typical).

The continuous-tuning capabilities of the CDRs, which cover all the standard OC-1/3/12 fixed-rate and multi-rate applications, also make them well-suited for a wider range of networking applications, including Ethernet, WDM transponders, test equipment, backplanes, regenerators/repeaters, broadband cross-connects, routers, multi-service provisioning platforms (MSPP), and next-generation SONET applications. The devices can also be used for video applications.

The ADN2813, ADN2814, ADN2815, and ADN2816 continuous-tuning CDRs are sampling now in 5-mm x 5-mm 32-lead chip-scale packages, and are priced at $19.50, $11.50, $17.55, and $10.35 per unit respectively in 1,000-piece quantities. Full production will begin in June 2005.
Analog Devices hasunveiled a new family of continuous-tuning clock and data recovery ICs for fixed-rate, multi-rate and continuous-tuning data communications and telecom applications.

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