Finisar, Opnext, and Sumitomo Electric/Excelight announce CFP transceiver MSA
MARCH 23, 2009 -- Finisar Corp. (search Lightwave for Finisar), Opnext Inc. (search Lightwave for Opnext), and Sumitomo Electric Industries, Ltd./Excelight Communications Inc. (search Lightwave for Sumitomo) have entered into a multisource agreement (MSA) to define a hot-pluggable optical transceiver form factor to enable 40- and 100-Gbps applications, including next-generation high-speed Ethernet (40GbE and 100GbE). Pluggable CFP transceivers will support the ultrahigh bandwidth requirements of datacom and telecom networks that form the backbone of the Internet.
According to industry analysts, IP traffic is expected to nearly double every two years through 2012, potentially resulting in core network bandwidth shortages. The IP traffic volume will be driven by high-quality video services like video-on-demand and IPTV as well as the availability of high-speed and high-capacity access networks such as FTTX and Wi-Fi. To prevent shortages, carriers and service providers are already planning the deployment of next-generation high-speed network protocols. IEEE is currently working on the standardization of 40- and 100-Gbps Ethernet under its P802.3ba Task Force. In addition to the existing 40-Gbps telecom standards, both the OIF and the ITU-T are working on standardizing SDH/OTN telecom interfaces for long-haul transmission of 100GbE.
Pluggable transceiver modules compliant to the CFP MSA will be used on these 40- and 100-Gbps interfaces. The CFP MSA is defining the specifications required to support multiple applications using the same form factor. These applications include various protocols (such as 40GbE, 100GbE, OC-768/STM-256, OTU3), media types (multimode and singlemode fiber optics) and link distances.
The CFP MSA utilizes features such as advanced thermal management, EMI management, and 10-Gbps signal integrity design to define the transceiver mechanical form factor, the optical connector, the 10x10-Gbps electrical connector with its pin assignments, the MDIO-based transceiver management interface, and the hardware required on the system host board.
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