Members of the Optical Internetworking Forum (OIF) have approved the Common Electrical I/O (CEI) 3.0 implementation agreement (IA). The IA defines electrical layer interfaces with signaling rates up to 28 Gbaud/s. The new IA one ups the previous CEI IA that addressed signaling rates up to 11.2 Gbaud/s.
The Physical and Link Layer (PLL) Working Group has been working on the Common Electrical I/O 25 Gbaud/s (CEI-25) project, which includes electrical specifications for 28 Gbaud/s signaling for chip-to-chip applications, and 25 Gbaud/s signaling for backplane applications. The OIF says the CEI 3.0 electrical layers provide a foundation for future protocol interfaces and were developed in conjunction with the OIF’s efforts to address 100-Gbps networks. The work will enable narrower interfaces for 100-Gbps applications, such as 100-Gigabit Ethernet, that will enable smaller package sizes, lower pin count components, connectors and optical modules, lower power dissipation, and clockless interfaces, according to the OIF.
“The CEI work is important to the networking industry because it paves the way to second-generation 100G systems and even beyond,” said Klaus-Holger Otto of Alcatel-Lucent and the OIF’s Technical Committee vice chair and CEI author. “Moving forward, these IAs will help to drastically reduce power and increase density of the system internal interconnects and therefore open the way for even higher integrated transmission systems in the near future.”
Within the CEI 3.0 IA, the CEI-28G-SR clause supports chip-to-chip interfaces up to 300 mm with one connector. The CEI-25G-LR clause supports backplane interfaces up to 680 mm with two connectors.