Time interval analysis provides a comprehensive view of the electrical and optical domains quickly and efficiently.
JOHN PERLICK, Wavecrest
For manufacturers of high-speed communications components and systems, deploying effective testing strategies is increasingly complex. In the past, conventional test methodologies could focus on narrow sets of characteristics in the electrical domain. Today, test platforms must address a range of critical factors spanning both electrical and optical domains. The challenges of real-world optical/electrical testing are driven by the following factors:
- Higher-speed interfaces that require tighter timing tolerances and jitter control.
- Complex opto/electrical designs, which can multiply the effects of jitter.
- A proliferation of different protocols that must be supported across heterogeneous optical networks.
- The need to certify components for compliance with protocol-specific standards to ensure reliable communications and interoperability.
- Greater demand for high volumes of opto/electrical devices, which requires faster and more efficient production testing processes.
To meet these challenges, component and systems suppliers need test equipment that can span both electrical and optical domains to enable comprehensive certification analysis. Testing platforms must also provide the flexibility for cost-effective deployment in development lab analysis applications and offer the speed required for high-volume production floor testing.
Ensuring complianceWith the convergence of data and voice traffic across optical-networking infrastructures, different standards have been established for assuring the integrity of high-speed serial data streams. In addition to SONET/SDH, some of these new standards include Gigabit Ethernet, Fibre Channel, InfiniBand, and the Optical Internetworking Forum's very-short-reach (VSR) work as well as the standards associated with new technologies such as parallel optical networks and passive optical networks (PONs) for fiber-to-the-home applications.To ensure acceptable signal integrity at the fundamental hardware level, each of these standards defines exacting jitter specifications. A product must meet these specifications to qualify as standards-compliant. The ability to control jitter within precise tolerances across a range of operating conditions provides the foundation for maintaining required bit-error-rate (BER) levels.
Specified jitter tolerances may differ from one standard to another, but many of the same root causes of jitter are encountered across various protocols. For any given hardware design, there is a significant degree of commonality with regard to the test points used to measure jitter levels. Therefore, device manufacturers can benefit from flexible protocol-agnostic testing platforms that analyze a wide range of jitter conditions while connected to the same standardized test points. (See the accompanying sidebar, "Optical-transceiver testing from design through manufacturing.")
Elements and sources of jitterSome finite amount of jitter is introduced by every part of the circuit, and the combination of these jitter elements can lead to significant degradation of overall signal integrity. In most cases, it is not enough to simply measure total jitter (TJ), because the various subsets of jitter have different degrees of impact on the network's performance.
Jitter in a circuit represents any deviation from the ideal timing of a specified event. TJ is the convolution of all independent jitter component probability density functions (see Figure 1). TJ comprises random jitter (RJ), which has Gaussian characteristics, and deterministic jitter (DJ), which can be segmented into periodic jitter (PJ), bounded uncorrelated jitter (BUJ), and data-dependent jitter (DDJ). It is often useful to further segment DDJ into jitter that is caused by duty-cycle distortion (DCD) or intersymbol interference (ISI).
RJ can be modeled as a Gaussian distribution, which makes it a useful tool for predicting jitter as a function of BER. Since the receiver side of an opto/electrical interface generally reacts differently to RJ versus DJ, the ability to separate RJ can give designers extra leeway for creating a more robust device. For this reason, most of today's serial data standards specify maximum values for both TJ and RJ. TJ and RJ are required for compliance certification, but many manufacturers find it beneficial to be able to drill down and specifically identify the various DJ sub-segments like PJ, DCD, and ISI. Each jitter element can be a useful indicator for the root sources of jitter, thus facilitating design improvements in the lab and process improvements on the production floor (see Table).
Comprehensive testing
As described above, capturing a complete picture of the jitter introduced by each element of a system is imperative for predicting overall system performance and targeting corrective actions. Conventional test approaches are not designed to quickly provide the comprehensive view required for rapid analysis and effective decision-making.
Digital sampling oscilloscopes can capture specific signal characteristics at high bandwidths and create eye-diagrams for tolerance testing. However, a scope is an inherently very slow method for collecting and analyzing the large samples of data needed to accurately characterize TJ, DJ, RJ, etc. BER testers (BERTs) can be used to extrapolate BER performance by counting bit errors that occur over long periods of time. Yet, BERTs cannot readily provide the complete picture that is needed to relate BER to jitter characteristics.
In contrast, time interval analysis (TIA)-based systems can measure the specific contributors to eye closure and estimate BER by deconvolving jitter into its random and deterministic subcomponents. Using advanced algorithms, TIA test platforms can rapidly create an accurate picture of RJ from a small set of samples and allow for a quick analysis of DJ elements.
Jitter profile
The core focus for TIA methodologies is to develop a profile of jitter characteristics as they relate to BER, without regard to the actual source of the signal data. Therefore, this approach is equally suited for analyzing data from both optical and electrical domains. Existing TIA analysis systems can now be coupled with optical signal acquisition modules to create cost-effective opto/electrical TIA test platforms. These systems also provide fully calibrated end-to-end test environments for both electrical and optical domains. As a result, manufacturers no longer face the challenges of integrating and calibrating separate platforms.
Protocol-agnostic TIA testers enable manufacturers to certify compliance with an array of communications standards, while supporting seamless diagnostic analysis of jitter sources in both electrical and optical domains. By deploying the same core TIA solutions from the development lab to the production floor, manufacturers can minimize learning curves, reuse test methods, and leverage capital equipment investments across the entire enterprise-all of which reduce time-to-market.
John Perlick is director of marketing at the optical division of Wavecrest Corp. (Eden Prairie, MN). He can be reached at 952-646-0506 or [email protected].
Time interval analysis (TIA) test platforms allow a single methodology for rapid testing, certification, and/or troubleshooting of optical transceivers against different communications standards. By connecting to the transceiver's test points, the TIA can measure all the elements of jitter (total jitter, random jitter, deterministic jitter, bounded uncorrelated jitter, periodic jitter, duty-cycle distortion, and intersymbol interference), relating them directly to bit-error rate and the compliance tolerances for each specific standard. By incorporating dynamic control of optical power levels, the TIA-based platform also supports efficient receiver sensitivity testing across a range of operating conditions.
Fast performance testing is particularly important for manufacturers of parallel or coarse WDM optical transmitters and receivers. These devices require repeated performance testing on each channel, further multiplying the total test time.
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