Synopsys, Inc. announced the release of its 1.6T Ethernet IP solution on Feb. 29, reporting that it enables design teams to create chips for AI and data center networking applications.
John Koeter, senior vice president of marketing and strategy for IP at Synopsys said in a press release, “The massive compute demands of hyperscale data centers require significantly faster Ethernet speeds to enable emerging AI workloads. Our complete IP solution for 1.6T Ethernet, pre-verified subsystems, successful ecosystem interoperability, and decades of expertise in developing and delivering the industry’s broadest interface IP portfolio allow designers to confidently integrate the necessary functionality into their SoCs with less risk.”
The solution includes 1.6T MAC and PCS Ethernet controllers, 224G Ethernet PHY IP, and verification IP, which Synopsys reports will accelerate time to market for AI and HPC networking chips. The company further reports that the solution can reduce interconnect power consumption by up to 50% compared to existing SoC implementations.
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Hayden Beeson
Hayden Beeson is a writer and editor with over seven years of experience in a variety of industries. Prior to joining Lightwave and Broadband Technology Report, he was the associate editor of Architectural SSL and LEDs Magazine.