The M8040A 64 GBaud High-Performance BERT is a highly integrated BERT for physical layer characterization and compliance testing of chips, devices, transceiver modules, subcomponents, boards, and systems with serial I/O ports. With support for PAM4 and NRZ signals and data rates up to 64 GBaud (corresponds to 128 Gbps), the M8040A BERT enables engineers to characterize and test compliance of receiver designs for 200GbE and 400GbE standards in the data center and communications industries.
With the M8040A, all critical test capabilities for input/receiver (RX) characterization are built-in. The pattern generator module provides calibrated and integrated jitter sources and de-emphasis to emulate the transmitter (TX) and to compensate for channel loss in the test setup. In addition, the M8040A provides an internal clock synthesizer and a second pattern generator output channel to emulate an aggressor lane.
Judge's comment: "This device provides a flexibility of physical layer test and compensation capabilities which should be valuable and enabling for the development and test of hyperscale 400G."
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