DECEMBER 20, 2007 --Silicon Line GmbH, a German fabless IC company focusing on ultra-low power analog ICs, says it has secured initial funding in a Series A round led by Belgium based Capital-E and Germany based Munich Venture Partners (MVP).
Silicon Line claims to have developed unique PHY-layer ICs for power-critical optical data transport applications in portable systems and devices. The company seeks to become the industrial partner to connector suppliers in diverse market segments. The company plans to use the proceeds of this financing to pursue fast-growing markets for its patented PHY-layer ICs and to accelerate the growth of its organization.
Capital-E Partner Pascal Vanluchene says, "Silicon Line impressed us with its unprecedented low-power standard CMOS ICs for optical links solving today's unacceptable interference issues given a multitude of available transmission standards and frequency bands. Trendy portable devices with simpler designs will go to the market much faster than ever before, and Capital-E is pleased to help realize the company's growth plan in that respect."
"We are excited to invest in a world class team of semiconductor designers who have proved that they are able to implement surpassing performance in standard CMOS," commented Dr. Soenke Mehrgardt, general partner at MVP. "This team, combined with a strategic marketing plan and a rich product roadmap, provides the building blocks for a very successful organization."
"We are delighted to welcome Capital-E and MVP as financial partners to Silicon Line. This investment will enable us to consolidate our leadership position in the analog IC market", said Holger Hoeltke, Silicon Line's founder and managing director.
Visit Silicon Line