Anritsu introduces SQA MP1900A BERT to speed design evaluation times
Anritsu Co. has introduced the Signal Quality Analyzer MP1900A, a bit error rate tester (BERT). The SQA MP1900A BERT enables engineers to verify the latest high-speed interface designs during early stages of development, according to the company.
The BERT offers simultaneous multi-channel measurements, PAM4 BER tests, and PCI Express link negotiation support. The MP1900A can be used to measure the latest high-speed electronic and optical devices, and high-end servers' optical transceivers, communications equipment, and optical transceivers/modules used in such applications as the machine-to-machine and Internet of Things.
The built-in pulse pattern generator (PPG) has intrinsic jitter of about 115 fs Rms, and Tr/Tf of 12 ps. Typical total peak-to-peak jitter is a maximum of 6 ps, while input sensitivity of the internal error detector (ED) is 15 mV.
Other features of the SQA MP1900A BERT include:
- A link negotiation function that supports high-speed digital interface standards connects the MP1900A to the device under test (DUT) to enable PCI Express Gen 4 and Gen 5 tests, LTSSM status analysis, jitter generation, and CM/DM noise injection.
- A jitter measurement function to evaluate signal integrity.
- A 10Tap emphasis function and equalizer function for characterizing test signals according to transmission path loss.
- A GUI that can display block diagrams on the instrument's 12.1-inch touch-panel display, with the ability for remote commands matching each GUI function to be displayed on-screen.
The SQA MP1900A BERT can be combined with peripheral equipment to expand measurement capability. Such a test setup can support generation of the 32 Gbaud and 64 Gbaud PAM4 signals required for 200 Gigabit Ethernet (GbE) and 400GbE measurements, BER measurements, jitter and amplitude noise injection, and emphasis addition.
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