Xilinx, Inc. (NASDAQ: XLNX) says it has started shipping the Virtex-7 X690T FPGA, which combines reliable high-speed serial transceivers, high system bandwidth, and optimized FPGA resources. The company claims that this is the first FPGA device, based on 80 GTH serial transceivers, to break the 2-Tbps bandwidth barrier.
The Virtex-7 X690T FPGA is the first of a set of devices in the 7 series to address advanced high-performance wired communication applications that require low-power, single-chip approaches. These devices are designed to enable fast, scalable, and easy-to-implement chip-to-chip serial interfaces, robust 10GBASE-KR backplanes that maximize bandwidth over board-to-board distances in next-generation communications equipment, and high signal-integrity interfaces to the latest optical modules validated to support cable distances of up to 80 km.
Customers who need even greater system capacity and bandwidth can migrate to the Virtex-7 X1140T FPGA, built using 3D Stacked Silicon Interconnect technology on the 7 series FPGA scalable optimized architecture. Shipments of footprint-compatible Virtex-7 X1140T FPGAs with 96 GTH transceivers will follow in May.
"Xilinx has taken its years of experience in serial transceivers – having shipped to date over 75 percent of all FPGAs that include serial transceivers – and combined that with the innovative low power, 28-nm 7 series FPGA architecture to deliver a highly optimized family for the wired communication marketplace," said Tim Erjavec, senior director of FPGA platforms at Xilinx. "Customers can confidently implement their designs starting with Virtex-7 X690T FPGAs today and move up to larger FPGAs that provide the market-optimized ratio of resources when higher integration is required."
The Virtex-7 X690T and X1140T FPGAs enable engineers to design and implement advanced packet processing, forward error correction, quality-of-service, switching, and traffic management algorithms. The dynamically controllable GTH serial transceivers include fully programmable three-tap FIRs that enable the transmitter de-emphasis needed to deal with the widest range of environments, along with fully-adapting seven fixed and four sliding tap receiver decision feedback equalization (DFE) circuits -- the most DFE taps in the industry, Xilinx claims -- to ensure the greatest margin over different topologies. To accelerate design and debugging, each GTH transceiver includes a non-destructive, high-resolution 2D eye-scan circuit that allows designers to see and measure the receiver eye from within the FPGA.
With 80 GTH transceivers that run up to 13.1 Gbps, the Virtex-7 X690T FPGA is first FPGA to break the 2 Tbps single FPGA device bandwidth barrier. By leveraging the advanced 7 series FPGA architecture built on the TSMC 28HPL process, Xilinx claims that customers can save more than 25 percent total power over competing similar-density FPGAs, allowing them to achieve the integration they need to build next-generation systems that achieve performance and low power requirements.
Virtex-7 X690T FPGA engineering samples are available today. Samples of Virtex-7 X1140T FPGAs will be available in May.
Digital signal processing specialist RADX Technologies, Inc. is using the new parts to design an EdgeQAM device to deliver narrowcast services such as video on demand. "As consumers demand more narrowcast services from cable companies, equipment manufacturers are faced with the challenge of providing future-proof solutions that adapt to emerging standards that are constantly evolving," said Ross Smith, CEO at RADX. "The EdgeQAM solution being developed by Xilinx and RADX benefits from the compatibility, flexibility, and density of the Virtex-7 X690T FPGA to provide systems that substantially increase QAM channel density while staying inside existing power envelopes."
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